Self-Immunity Technique to Improve Register File Integrity

Faarok Syed, Dr.V.Venkata Rao


Continuous shrinking in feature size, increasing power density etc. increase the vulnerability of microprocessors against soft errors even in terrestrial applications. The register file is one of the essential architectural components where soft errors can be very mischievous, because errors may rapidly spread from there throughout the whole system. Thus, register files are recognized as one of the major concerns when it comes to  reliability. This paper introduces Self-Immunity, a technique  that improves the integrity of the register file with respect to soft errors. Based on the observation that a certain number of register bits are not always used to represent a value stored in a register. This paper deals with the difficulty to exploit this obvious observation to enhance the register file integrity against soft errors. We show that our technique can reduce the  vulnerability of the register file considerably while exhibiting  smaller overhead in terms of area and power consumption compared to state-of-the-art in register file protection.


Registers, Self-Immunity, Soft Errors, Vulnerability


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